/*
 * @[H]:  Copyright (c) 2021 Phytium Information Technology, Inc. 
 * 
 *  SPDX-License-Identifier: Apache-2.0. 
 * 
 * @Date: 2021-07-13 16:37:23
 * @LastEditTime: 2021-08-02 10:03:04
 * @Description:  Description of file
 * @Modify History: 
 * * * Ver   Who        Date         Changes
 * * ----- ------     --------    --------------------------------------
 */
#include "f_spi.h"
#include "f_spi_hw.h"
#include "ft_debug.h"

#define FSPI_HW_DEBUG_TAG "FSPI_HW"

#define FSPI_HW_ERROR(format, ...) FT_DEBUG_PRINT_E(FSPI_HW_DEBUG_TAG, format, ##__VA_ARGS__)
#define FSPI_HW_DEBUG_I(format, ...) FT_DEBUG_PRINT_I(FSPI_HW_DEBUG_TAG, format, ##__VA_ARGS__)
#define FSPI_HW_DEBUG_W(format, ...) FT_DEBUG_PRINT_W(FSPI_HW_DEBUG_TAG, format, ##__VA_ARGS__)

void FSpiHwInit(FSpi *instance_p)
{
    FT_ASSERTVOID(instance_p != NULL);
    FSpiConfig *config_p;
    config_p = &instance_p->config;

    FSpiResetChip(config_p->base_address);
    if (!config_p->tx_fifo_len)
    {
        u32 fifo;
        for (fifo = 1; fifo < 256; fifo++)
        {
            FSPI_WRITEREG32(config_p->base_address, FSPI_TXFTL_R_OFFSET, fifo);
            if (fifo != FSPI_READREG32(config_p->base_address, FSPI_TXFTL_R_OFFSET))
            {
                break;
            }
        }
        FSPI_WRITEREG32(config_p->base_address, FSPI_TXFTL_R_OFFSET, 0);

        config_p->tx_fifo_len = (fifo == 1) ? 0 : fifo;
    }
}
